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AMBE-3000F™ Vocoder Chip Users Manual
Version 3.4, April, 2014
Electrical Characteristics and
Requirements
3.9.9 Low Power Mode when using the SPI Codec Interface
When the SPI codec interface is used the SPI_WAKE (TQFP pin 106 / BGA pin D9) signal must be connected to the inverted
frame sync signal from the codec. The signal is needed in order to wake the chip from the standby state.
3.9.10 Low Power Mode when using the Parallel Packet Interface
No additional connections are required to use low power mode with the parallel interface.
3.9.11 Additional Requirements when Low Power Mode is enabled.
If low power mode is enabled, there are some restrictions on when a packet can be sent to the AMBE-3000F™ Vocoder Chip.
One of the following methods most be chosen.
Method 1: Prior to the start of any packet transfer to the AMBE-3000F™ Vocoder Chip, the STDBY_ENABLEn (TQFP pin
75 / BGA pin K14) pin must be set low at least 500ns prior to sending the first byte of a packet via UART, McBSP, or Parallel
Port. The signal should be set high anytime after the first byte of the packet has been transferred to the AMBE-3000F™
Vocoder Chip. When the STDBY_ENABLEn is held low, the AMBE-3000F™ Vocoder Chip is prevented from entering the
standby state, so it is important that the STDBY_ENABLEn signal is set high prior to the end of the last byte of the packet.
OR
Method 2: STDBY_ENABLEn (TQFP pin 75 / BGA pin K14) must be pulled high or left disconnected. Prior to the start of
any packet transfer to the AMBE-3000F™ Vocoder Chip, wait for a transition of the STANDBYn (TQFP pin 44 / BGA pin
M6) signal from the high state to the low state. After the transition is detected begin sending the first byte of the packet to the
AMBE-3000F™ Vocoder Chip via UART, McBSP, or Parallel Port within 100µs after the transition was detected.
OR
Method 3: A packet may be sent to the AMBE-3000F™ Vocoder Chip at anytime after the AMBE-3000F™ Vocoder Chip has
begun transmitting a packet up until the time the AMBE-3000F™ Vocoder Chip has just finished transmitting the packet. It is
important that the first byte of the packet being sent to the AMBE-3000F™ Vocoder Chip be sent before the last byte of the
packet is received from the AMBE-3000F™ Vocoder Chip.
3.9.12 Typical AMBE-3000F™ Vocoder Chip Power Measurements:
Test Conditions Power Measurement
Low Power Mode NOT Enabled Low Power Mode Enabled
Codec Mode (SPI Interface)
UART Packet Interface
50% Voice Activity
1.8v uses 154 mW
3.3v uses 26 mW
Total
180 mW
1.8v uses 62 mW
3.3v uses 23 mW
Total
85 mW
(DTX enabled)
Packet Mode
UART Packet Interface
Not receiving packets
125 mW
(AMBE-3000F™ Vocoder Chip
is in the idle state)
22 mW
(AMBE-3000F™ Vocoder Chip is in
the standby state)
Maximum Current Values
1.8v = 193 mW
3.3v = 171 mW
Table 8 Typical AMBE-3000F™ Vocoder Chip Power Measurements
(Subject to Change) Page 28
DVSI CONFIDENTIAL PROPRIETARY
- AMBE-3000F™ Vocoder Chip 1
- DVSI Confidential Proprietary 1
- (Subject to Change) Page v 5
- (Subject to Change) Page x 10
- 1 Product Introduction 11
- 1.3 Typical Applications 12
- 2 Hardware Information 13
- 2.2 Package Details 14
- (Subject to Change) Page 5 15
- 2.3 Pin Assignment Layouts 16
- A B C D E F G H J K L M N P 17
- (Subject to Change) Page 8 18
- (Subject to Change) Page 9 19
- 2.5 Pin Out Table 20
- PARITY_ENABLE 79 22
- Input Enable parity bit 22
- Table 1 Pinout List 26
- 2.7.1 External Clock Source 29
- 2.7.2 Crystal Oscillator 29
- Table 7 Voltage Supply Pins 32
- 3.6 Reset Behavior 33
- Figure 11 TX_RDY after Reset 34
- Figure 12 Output Levels 34
- 3.8 Power-Down Sequencing: 35
- 3.9 Low Power Modes 35
- 3.9.1 Run State 36
- 3.9.2 Idle State 36
- 3.9.3 Standby State 36
- 3.9.4 Halt State 36
- 3.9.5 Power Modes 37
- 4.2 Interface Selection 40
- 4.4 Vocoder State 41
- Figure 18 Typical Echo Path 43
- Table 11 Companding Control 44
- 5 I/O Management 45
- Table 13 ECMODE_IN Flags 46
- Table 14 ECMODE_OUT FLAGS 46
- Table 15 DCMODE_IN Flags 47
- Table 16 DCMODE_OUT Flags 47
- 5.2 Codec mode 49
- “0 to Transition”“1” 51
- “Packet_ _Zone”Uncertainty 51
- “aperiodic packets” 52
- 5.3 Packet Mode 53
- Figure 29 Packet Mode 55
- 5.5 SPI Interface 56
- 5.6 UART Interface 57
- 5.7 McBSP Interface 58
- 5.8 Parallel Interface 61
- Table 26 PPT Timing 62
- Figure 36 Vocoder Front End 64
- Diagram 66
- 6.1 Overview 68
- 6.2 Codec Mode Operation 68
- 6.3 Packet Mode Operation 68
- 6.4 Packet Interfaces 69
- 6.5 Packet Format 69
- 6.5.3 TYPE (1 byte) 70
- 6.5.4 Packet Fields 70
- Table 59 PKT_CODECSTOP Field 78
- Table 61 PKT_CHANFMT Field 79
- samples dcmode 80
- Table 64 PKT_SPCHFMT Field 80
- 0x54 0x46 0x00 81
- Table 71 PKT_READY Field 82
- Table 72 PKT_HALT Field 82
- Table 73 PKT_RESET Field 82
- 6.7.1 Speech Packet Fields 89
- Table 100 CMODE Field Format 90
- Table 103 TONE Field Format 90
- 6.11 Example Packets 94
- 7 Appendices 98
- Table 115 Rate Index Numbers 100
- 8 Support 103
- Digital Voice Systems, Inc 104
- 10 IC Chip Software Errata 107
- Release 007 09/10/2009 108
- Release 014 08/31/2012 108
- 11 History of Revisions 109
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